1. Field of the Invention
The present invention relates to an image display device, such as an LCD (liquid crystal display), a PDP (plasma display), and an LED (light emitting diode), and, in particular, to the drive section of an image display device.
2. Description of the Related Art
Liquid crystal displays have been commercially manufactured as flat panel displays or projection TV. An example of the liquid crystal display is an active matrix type display using TN liquid crystal. In the active matrix type display, each pixel is equipped with an active matrix element, such as TFT (thin film transistor), a diode element, or an MIM (metal insulator metal). Due to its switching characteristics, the active matrix element maintains a voltage application state for a period substantially longer than the line selection period for the TN liquid crystal, which is rather slow in response, thereby assisting the liquid crystal in optical switching response. Further, by thus maintaining the voltage application state for a liquid crystal having no memory property (self-holding property), the active matrix element provides a substantial memory state for one frame. Further, theoretically, it allows no crosstalk between lines or between pixels, thereby providing a satisfactory display property.
FIG. 16 shows the drive circuit of an active matrix type display. The drive circuit shown in FIG. 16 comprises: a pixel section composed of a liquid crystal cell 1401 having a liquid crystal material sealed in a space defined between a common electrode (at potential VcoM) and each pixel electrode, and a pixel TFT 1402; an image signal wiring section (hereinafter referred to as "signal wiring") 1403; a line buffer section 1404; a shift pulse switch 1408; an output switch 1410, a horizontal shift register 1405, gate signal wiring (hereinafter referred to as "gate wiring"); and a vertical shift register 1406. Recording signals are sequentially transferred from a signal input terminal 1407 to the pixels or lines with a shifted timing.
FIGS. 17(a) and 17(b) show the drive pulse timing of this conventional active matrix liquid crystal display device. The drawings illustrate the display device with respect to a line sequential drive method. That is, the recording of image signals to be recorded in the liquid crystal is effected as follows: image signals corresponding to one line information are recorded in the buffer section 1404 through the shift pulse switch 1408, driven by the horizontal shift register 1405 emitting an output in synchronism with the frequencies of the image signals (FIG. 17(a)). After the image signals corresponding to all the pixels of a line have been recorded in the line buffer section 1404, an image signal is recorded in each liquid crystal cell through the pixel switch turned ON by the output switch 1410 of the line buffer section 1404 and the vertical shift register 1406. The signal transfer to each liquid crystal cell is generally effected collectively for one line during the blanking period in the horizontal scanning. With the above-described timing, the image signals are sequentially transferred to the pixels (FIG. 17(b)).
The liquid crystal molecules constituting the cell move in response to the signal voltage thus transferred, whereby the transmissivity of the liquid crystal cell changes according to the direction of a deflection plate separately provided in a cross polarizer relationship. A difference in this transmissivity constitutes the density of each pixel, whereby the liquid crystal cell operates as a display means.
However, in this conventional construction, the display area of an image is uniquely determined by the connecting relationship between the horizontal shift register, the vertical shift register and the display pixels. This leads to the problem, for example, that a difference exists in the number of display pixels between the NTSC and PAL television systems. Conventionally, dedicated display pixels have been respectively designed for each of these systems, resulting in a large amount of time and labor being required for the designing. Further, it has been necessary for the two different types of dedicated display devices for these systems to be separately manufactured.
Naturally, it has been impossible to use a display device intended for one system in an area where the other broadcasting system has been adopted. An attempt to make a display device compatible with both systems would meet with the following difficulty: when a display is to be given on the NTSC system by using a device designed for the PAL system, a PAL system image area 162 is larger than a display device area 161 for the NTSC system, as shown in FIG. 18(a), so that it is impossible to display the entire signal on the PAL system. Conversely, when a display is to be given on the NTSC system by using a display device designed for the PAL system, the display position is restricted by the start position of the shift register, so that, as shown in FIG. 18(b), the center of the image does not coincide with the display device center 163, with the result that an area with no image signal is generated.